Little Blue

IBM in nano-wonderland

—by Richard Mandel

Conjecture and speculation have drifted about for years, debating what products will be miniaturized and how tiny they’ll become. Even Dick Tracy’s two-way wrist radio evolved into the wrist TV, though Chester Gould probably never foresaw the portable DVD player. The backpacked radiotelephone of WW2 is today’s belt-mounted fashion accessory and probably tomorrow’s fingertip garnish. Large-screen televisions became more acceptable, as they moved from big footprint to wall-mounted. Digital cameras. Palm-top computers. And that’s just a few consumer products. Medical and military applications for shrinking electronic packaging are keeping pace with developments and, in some cases, helping to drive the market along.

Among the many companies, shops and institutions exploring new directions for electronics strives the IBM Corporation. Having started out with mechanical adding machines, their work in computers dates back to the Automatic Sequence Controlled Calculator. Also called the Mark I, it was completed in 1944 after six years of development with Harvard University. It was the first machine that could execute long computations automatically. Over 50 feet long, eight feet high and weighing almost five tons, the Mark I took less than a second to solve an addition problem but about six seconds for multiplication and twice as long for division — far slower than any pocket calculator today.

Down the rabbit hole

Today’s IBM computer rests lightly on a user’s lap and generates thousands of calculations per second. And in their research labs lies the promise of further size reductions to the atomic, molecular or macromolecular levels — nanotechnology.

Key to their progress is work in carbon nanotubes. Depending on their structure, nanotubes can be metals or semiconductors. The structures are extremely strong and have good thermal conductivity, valuable qualities to have in nano-circuitry. Researchers have been testing semiconductor nanotubes as components for field-effect transistors, measuring the results for their transconductance (a measure of current-carrying capability that reflects how fast a transistor can operate). Experimenting with different structures, IBM researchers used carbon nanotubes as the transistor gate — the electrode that controls the flow of electricity. The nanotube devices were created within structures resembling conventional complementary metal-oxide semiconductor (CMOS) transistors, using a thin dielectric as insulating material. Such a design allows independent gating of each transistor, making it possible to generate CMOS circuits that have a simpler design and consume less power.

The result was carbon nanotube transistors with more than twice the transconductance of experimental silicon transistor devices, which are, in turn, faster than their commercial cousins. The difference in physical scale makes the result even more striking — the width of an FET device is typically 2 to 10 microns, while the active, current-carrying element in a CNFET (the nanotube itself) is about 1.5 nm in diameter.

Outside of the reduced form factor, what would have to be changed in designing circuits for CN devices? According to IBM researcher Shalom Wind, “It’s possible that the implementation of carbon nanotubes in transistor devices may not substantively affect the design industry. On the other hand, we may find that there are different things that may make them a whole new ball game. In contrast to work that’s come out of molecular electronics, where there have been a lot of two-terminal devices that would require entirely new architecture, carbon nanotubes can be used to build a conventional three-terminal CMOS device.”

It’s still early to anticipate CN transistor devices rolling off production lines, however. “It’s difficult to predict,” says Wind. “We’re in fundamental research now. To go from the research lab to the manufacturing line is a pretty long path, with a lot of challenges to be met. Many of these we have yet to address. But our current results are motivating us to continue pursuing this direction.”

Sampling the flask

Transistors are not the only component worth shrinking. There have been components, particularly used in telecommunications that hold potential for cost reduction with diminished size. Constructed using MEMs technology, RF switches, reference oscillators, filters and varactors are a few of the devices that could replace expensive and bulky off-chip passive components.

As reported in a paper from IBM’s Watson Research Center, the most critical design factors for RF communications resonators and filters are the ability to reach the frequencies of interest (~900 MHz to 2.1 GHz), low power and/or bias voltages, size and cost. To meet these needs, high-modulus/low-density materials must be used, aggressive scaling of both beam and gap dimensions is required, and straightforward integration with analog IC processes is desirable.

As response to this mandate, the IBM team has demonstrated a low temperature, Bi-CMOS compatible process for the fabrication of MEMs resonators and filters. Simple cantilever and fixed beam resonator structures that use electrostatic actuation were fabricated on 200 mm wafers in standard production tools, using materials and processes routinely employed for on-chip interconnect in a typical CMOS line. The devices operate in the intermediate frequency range and exhibit the very high Q-factors characteristic of mechanical resonators. Critical dimensions involved include beam thicknesses of 0.6 to 1.0 µm, with gaps of 300 to 3000Å.

The ultimate goal, according to researcher Jennifer Lund, is to have all components on a single, large-scale chip. By doing that, “one way to look at it is that we’re replacing existing functionality,” says Lund. “It’s also entirely possible that new architectures will be born and new ideas will come out of this that will enable functionality that we don’t have right now.”

An electromechanical MEMs RF switch, concurrently under development, would have very low insertion loss, even below 0.5 dB, which would be lower than a state-of-the-art active switch. Such a switch would handle switching between antennas and even bands in small, handheld devices.

Edge of the mushroom

In the latest nanotechnology advance from IBM, staff scientists demonstrated a data storage density of a terabit per square inch — enough to store 25 million printed textbook pages on a surface the size of a postage stamp — in a research project code-named “Millipede”.

Rather than using traditional magnetic or electronic means to store data, Millipede uses thousands of nano-sharp tips to punch indentations representing individual bits into a thin plastic film. The result is, ironically, akin to a nanotech version of the data processing ‘punch card’ used by IBM in the company’s earliest days, but there are two crucial differences: the ‘Millipede’ technology is re-writeable; and more than 3 billion bits of data may be stored in the space occupied by just one hole in a standard punch card.

The core of the system is a two-dimensional array of V-shaped silicon cantilevers 0.5 microns thick and 70 microns long. At the end of each cantilever is a downward-pointing tip less than 2 micrometers long. The current experimental setup contains a 3 mm² array of 1,024 (32 x 32) cantilevers, which are created by silicon surface micromachining. A sophisticated design ensures accurate leveling of the tip array with respect to the storage medium and dampens vibrations and external impulses. Time-multiplexed electronics, similar to that used in DRAM chips, address each tip individually for parallel operation. Electromagnetic actuation precisely moves the storage medium beneath the array in both the x- and y-directions, enabling each tip to read and write within its own storage field of 100 microns on a side. The short distances to be covered help ensure low power consumption.

For the operation of the device — i.e. reading, writing, erasing and overwriting — the tips are brought into contact with a thin polymer film coating a silicon substrate only a few nanometers thick. Bits are written by heating a resistor built into the cantilever to a temperature of typically 400ºC. The hot tip softens the polymer and briefly sinks into it, generating an indentation. For reading, the resistor is operated at lower temperature, typically 300ºC, which does not soften the polymer. When the tip drops into an indentation, the resistor is cooled by the resulting better heat transport, and a measurable change in resistance occurs. To over-write data, the tip makes a series of offset pits that overlap so closely their edges fill in the old pits, effectively erasing the unwanted data. More than 100,000 write/over-write cycles have demonstrated this re-write capability.

When operated at data rates of a few megabits per second, Millipede is expected to consume about 100 mW, which is in the range of flash memory technology and considerably below magnetic recording. The 1,024-tip experiment achieved an area density of 200 gigabits per square inch, which translates to a potential capacity of about 0.5 gigabytes in 3 mm². The next-generation will have four times more tips: 4,096 in a 7 mm² (64 x 64) array.

Additional areas of nanotechnology research at IBM include investigations of manufacturing thin-film transistors on transparent plastic using room temperature fabrication processes, and the possibility of self-assembling nanocrystals and magnetic nanocrystals, which could create an entirely new realm of materials for electronic devices. As Thomas Theis, IBM Research’s director of physical sciences, remarked at a recent conference, “Nanotechnology will allow the design and control of the structure on all length scales, from the atomic to the macroscopic, [which will] enable more efficient and vastly less expensive manufacturing processes [and] provide the hardware foundation for future information technology.”